Project · Creator and maintainer
HVDC datacenter simulator
A bottom-up model of the AI rack power chain, built to derive the tolerance specifications that do not exist yet.
Updated
Context
AI and high-performance-computing racks are moving to high-voltage DC distribution — 800 volts unipolar in the NVIDIA architecture, plus or minus 400 volts bipolar in the OCP Mt Diablo work — and the power chain from the GPU die upward is being redesigned around it.
Constraint
The alternating-current world has ITIC: an agreed curve saying what a supply is allowed to do and what the load must survive. The 800 volt DC world has no equivalent, and no agreed rationale for hold-up time now that the rectifier no longer sets it. Specifications are being written without the curve that should justify them.
Contribution
I built a behavioral simulator of the full chain — GPU die, multi-phase point-of-load regulator, 48 volt intermediate bus, power-supply or DC-DC sidecar, and the HVDC bus itself — in order to derive the missing tolerance specifications rather than assume them.
Approach
Each level is modeled as a contract with the level above it: a voltage window and current slew rate at the die, output impedance and loadline at the regulator, ripple and dynamic tolerance on the intermediate bus, hold-up energy and transient response at the supply. The unknown at the top is then derived from the requirements below instead of being asserted.
Outcome
Tolerance and hold-up numbers for the new architectures can be argued from a chain of stated contracts, which is what a specification discussion needs in order to converge.
Evidence
The work is held in a private repository. The modeled chain, the per-level contracts, and the derivation are documented there.